On Feb. 8, 2017, Intel CEO Brian Krzanich and President Donald Trump announced that Fab 42 would finally be completed. This would bring 7 nanometer manufacturing to Chandler Arizona in a projected time line of 3 to 4 years. With TSMC already in trial production and Global Foundries set to begin tests later this year, the question is why?
Technology is always twenty years behind. With the first 5nm transistor being produced in 2003 by NEC Corporation, and estimated to enter early manufacturer testing in 2020, why would Intel invest $7 Billion dollars into a facility that would soon not be on the forefront?
Citing the cost and complexity of the technology, Bob Johnson, an analyst at Gartner, projects that 7nm could get pushed out to 2020. This is roughly a year or two later than expected based on some chipmakers’ roadmaps.
This would impact the potential timing of 5nm, if the industry decides to move forward with the technology. “I assume 5nm will happen, but not by 2020,” Johnson said, adding that a viable 5nm process may not appear until the next decade, possibly 2023.
Silicone is also reaching its limit. Intel is looking for a suitable replacement for its <10nm architectures. Researchers from Purdue University, Intel, and SEMATECH created a consortium dedicated to finding an alternative. The Scientists found promise in Molybdenum Disulfide. However, a key obstacle to its practical use has been a large electrical resistance between metal contacts and single-atomic layers of the material. This “contact resistance” limits the flow of current between the contacts and the molybdenum disulfide, hindering performance.
Researchers have shown how to overcome this obstacle by “doping” the material with the chemical compound 1,2 dichloroethane (DCE), meaning single layers of molybdenum disulfide are impregnated with the DCE. This doping results in a 10-fold reduction of contact resistance and a 100-fold reduction of contact resistivity, another measure of resistance. This has been called “Molecular Layer Doping”.
At the end of the day, what does this all mean? According to researchers at Gartner, 7nm provides a 35% speed improvement, using 65% less power, and a 3.3X density improvement on the chip. Also PPASC metrics and cost-per-transistor curve both show 7nm to be a more economical option. Thus creating more energy efficient circuits while increasing the processing power.